dr-11800 16-bit digital-to-resolver converter description the dr-11800 is a small size, high accuracy, 16-bit digital-to-sine/cosine converter. available in accuracies up to 1 arc minute, the dr-11800 is con- tained in a 28-pin, one-square-inch hermetically sealed package and requires +15 vdc and -15 vdc power supplies. the reference conditioner allows for either 115 vrms or 26 vrms reference input for a 6.8 vrms sin/cos output. two registers for the input of the 16-bit (cmos/ttl) natural binary angle data allow for compatibility with an 8-bit or 16-bit data bus. internally, the dr-11800 has a multi- plying digital-to-sin/cos converter made of two function generators and a quadrant select network. quadrant information is available from the two most significant bits. the two function generators use the remaining angular data along with the buffered reference voltage. similar to a multiplying dac (digital-to-analog converter), the dr- 11800 uses high accuracy resistive ladder networks and solid state switching to control the attenuation of the reference voltage. the output buffer amplifiers allow for up to 2 ma output drive. applications high accuracy, high reliability, small size, low power consumption and mil-prf-38534 processing avail- ability, make the dr-11800 suitable for industrial and military ground or avionics applications. possible appli- cations include digital remote posi- tioning, resolver angle simulators, flight trainer, flight instrumentation, radar and navigational systems, and ppi displays incl uding moving target indicators. other applications are syn- chro/resolver system development and test, and wraparound test of syn- chro/resolver-to-digital converters. features ? 28-pin square package ? 1 arc minute accuracy ? 0.03% radius accuracy ? microprocessor compatible - 8- and 16-bit ? double-buffered inputs ? pin-programmable reference input (for 26 and 115 vrms) ? dc-coupled reference and outputs ? requires only 15 v power supplies ? ttl and cmos compatible ? pin-for-pin replacement for natels hdr2406 9 1 2 3 4 5 6 7 8 11 12 13 14 15 16 17 18 10 19 23 gnd 22 21 26 20 28 25 24 rl26 rh115 rh26 reference conditioner bit 16 (lsb) cos q sin q buffer amplifiers 16-bit high accuracy multiplying digital to sin / cos converter 16-bit holding register (msb bit 1) q1 d d q16 ck pe 8-bit input register ck ck 8-bit input register input buffers Cv s +v s hbe (msb) b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15 (lsb) b16 lbe ldc 27 rl115 - + ? 1996, 1999 data device corporation figure 1. dr-11800 block diagram
table 1. dr-11800 specifications (continued) 2 table 1. dr-11800 specifications parameter value remarks scale factor variation scale factor variation 0.1% max reference input (rh-rl) voltage frequency range input resistance differential solid-state input. 115 v rms reference 26 v rms reference no external logic volt- ages required. cmos transient pro- tected. for less than 16 bits, unused pins can float. unused pins can float. digital angular resolution accuracy 16 bits 4 arc-minutes 2 arc-minutes 1 arc-minutes 115 v rms or 26 v rms dc to 1000 hz differential 230 k w differential 52 k w simultaneous ampli- tude variation in both outputs as a function of digital angle. analog outputs max sin q , cos q output current output impedance zero offset (dc) offset drift output settling time output voltage varies in direct proportion to reference voltage. op amp output. for any digital step change. digital inputs logic levels logic 0 logic 1 loading input current data bits (b1-b16) hbe, lbe, ldc register controls hbe lbe ldc pulse width logic 1 logic 0 logic 1 logic 0 logic 1 logic 0 600 h sec min parameter remarks register controls (continued) data set-up time data hold time 200 h sec min 200 h sec min before data transfer. before input data changes. power supplies supply voltages (vs) supply current supply rejection 28 pin square 1.0 x 1.0 x 0.21 in. (25 x 25 x 5.3) mm 0.6 oz (17 g) max 0c to +70c -55c to +125c -65c to +135c absolute maximum ratings reference input: twice normal voltage power supply voltage (vs): 18 v dc digital inputs: -0.3 v dc to +6.5 v dc without output clip- ping. ty p. 8 msbs enter high byte input register. high byte register remains unaffected. 8 lsbs enter low byte input register. low byte register remains unaffected data from input regis- ters transferred to holding register. data in holding regis- ter remains unaffected for guaranteed data transfer. tempeature ranges operating case -3xxx and -8xxx -1xxx and -4xxx storage physical characteristics type size weight note. although digital inputs are cmos protected, storage in conductive foam is recommended. 15 v dc 10% 35 ma max 70 db 6.8 v rms, 1.5 % 2 ma rms < 1 ohm 10 mv typical 25 mv max 25 m v/c typical, 50 m v/c max 50 m sec max to accuracy of con- verter. bit 1 = msb, bit 16 = lsb accuracy applies over operating temperature range. -0.3 vdc to 0.8 v dc 2.4 vdc to 5.5 v dc 0.1 ttl load 15 m a typ, active pull-down to gnd -15 m a typ, active pull-up to internal logic supply value
digital interface the dr-11800 has double-buffered input registers which allow for easy implementation of an interface with 8-bit or 16-bit data buses. the dr-11800 can also be set up for asynchronous data inputs. if the lbe, hbe and ldc input pins are left open, the internal pull-up circuitry will set these pins to a high state and the information at the data inputs (b1-b16) will be continuously con- verted to sin q and cos q at the analog outputs. in applications requiring less than 16-bit resolution, the unused pins can be left open. the data bits (b1-b16) are internally pulled-down to apply a logic 0 to unconnected data inputs. 3 analog output phasing the dr-11800 provides an output of 6.8v sin q and 6.8v cos q for either a 26 vrms reference (use pin 26; rh26, and pin 22; rl26) or 115 vrms reference (use pin 21; rh115, and pin 27; rl115). figure 2 illustrates the input connection for a 26v or 115v reference. figure 3 illustrates the output phasing. +v s Cv s sin q cos q gnd rl 26 rh 115 rl 115 rh 26 ldc lbe hbe 16-bit angular data 115 v reference 22 27 21 26 n/c n/c note: n/c no connection +v s Cv s sin q cos q gnd rl 26 rh 115 rl115 rh26 ldc lbe hbe reference 26 v 16-bit angular data 22 27 21 26 n/c n/c figure 2. connections to 26 v/115 v reference in phase with v in 0 90 180 270 360 sin q cos q -v max q degrees v max sin output = 6.8v rms(1+n)sin q cos output = 6.8v rms(1+n)cos q n is the scale factor variation as a function of digital angle( 0. 1%) figure 3. output phasing
4 data transfer from an 8-bit data bus applications with an 8-bit data bus require two-byte loading of the digital input (see figure 4). figure 5 shows the timing for two-byte data transfers. 1. ldc is low (logic 0) so that the contents of the holding regis- ter are latched and will remain unaffected by the changes on the input registers. 2.when the lbe is set high (logic 1) the 8 lsbs (b9-b16) are transferred to the low byte. the lbe must remain high for a min- imum of 800 nsec after the data is stable. the data should remain stable for 200 nsec after the lbe is set low (logic 0). 3.when the hbe is set high (logic 1) the 8 msbs (b1-b8) are transferred to the low byte. the hbe must remain high for a min- imum of 800 nsec after the data is stable. the data should remain stable for 200 nsec after the hbe is set low (logic 0). 4.when the ldc is set high (logic 1) the data is transferred from the two input registers to the holding register. the ldc should be held high for 600 nsec minimum. once the ldc is set low, the cycle can begin again. note: lbe, hbe, and ldc are level-actuated functions. data transfer from a 16-bit data bus applications interfacing with a 16-bit data bus require only single byte loading, as shown in figure 6. lbe and hbe are either unconnected or tied together and pulsed high to load data. as shown in the timing diagram (see figure 7) 200 nsec after the data is stable the ldc is set high (logic 1) to transfer the data to the holding register. since ldc is level actuated, it must remain high for the time specified (600 nsec) to transfer the data. b1 b2 b3 b4 b5 b6 b13 b12 b11 b10 b9 b8 b7 b14 b15 b16 (lsb) (msb) 1 2 3 4 5 6 7 8 11 12 13 14 15 16 17 18 dr-11800 lbe hbe ldc load converter not connected or load data pulse 10 9 19 figure 6. data transfer from 16-bit bus 1 12 4 3 2 5 6 7 8 11 13 14 15 16 17 18 lbe hbe ldc load converter load msbs load lsbs dr-11800 (msb) (lsb) d7 d1 d2 d3 d4 d5 d6 d0 hbe lbe data bus pulse width 600 ns min pulse width 600ns min data transferred t o holding registers 8 msbs transferred to input registers data changing data steady (lsbs) data set up 200 ns min data hold 200ns min (msbs) 8 lsbs transferred to input registers data lbe ldc hbe 600 ns min figure 5. timing for 8-bit bus transfer figure 4. data transfer from 8-bit bus
5 r l r h 1:n r h 16-bit angular data dr-11800 sin q cos q 1:n 1:n s1 s3 s4 s2 28 20 p.a. p.a. r l dr-11800 sin q cos q 1:n s1 s3 s2 28 20 p.a. p.a. 1: ? 3 2 n r l r h 1:n r h 16-bit angular data r l 600 ns min data transferred to holding registers data changing data steady all 16 bits data transferred to input registers data hbe lbe ldc 200 ns min 200 ns min 600 ns min figure 7. timing for 16-bit bus transfer figure 9. 3-wire digital-to-synchro converter figure 8. 4-wire digital-to-resolver converter digital-to-resolver/synchro converters the dr-11800 provides single-ended sin/cos outputs. figure 8 shows the dr-11800 connected as a 4-wire digital- to-resolver converter (s1, s2, s3, and s4) using external power amplifiers and transformers. figure 9 shows the dr-11800 connected as a 3-wire digital- to-synchro converter (s1, s2, and s3) using external power amplifiers and transformers. power supply decoupling decoupling capacitors are recommended on the +v s and -v s supplies. a 1 m f tantalum capacitor in parallel with a 0.01 m f ceramic capacitor should be mounted as close to the supply as possible.
6 table 2. dr-11800 pinouts pin function pin function 1 b1 15 b13 2 b2 16 b14 3 b3 17 b15 4 b4 18 b16 5 b5 19 ldc 6 b6 20 cos q 7 b7 21 rl115 8 b8 22 rl26 9 hbe 23 gnd 10 lbe 24 +vs 11 b9 25 -vs 12 b10 26 rh26 13 b11 27 rh115 14 b12 28 sin q figure 10. dr-11800 mechanical outline bottom view .995 .020 (25.2) .800 (20.3) typ .100 (2.54) .10 denotes pin 1 .100 typ (2.54) .10 (2.54) .800 (20.3) .020 .995 (25.2) .100 typ (2.54) .20 (5.1) .25 typical (6.3) .018 dia. typ. (0.46) tolerances .xx = .02 .xxx = .005 notes: 1. case is electrically floating 2. container is kovar electroless nickel plated. 100 to 200 micro inches thk. pins gold plated per mil-g-45204 type 1 class 150 micro inches thk. 3. designations are for reference only and do not appear on unit. 4. pin #1 is designated by a contrasting colored bead 5. dimensions shown in inches and (mm). 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 side view
ordering information dr-11800dx-xxxx supplemental process requirements: s = pre-cap source inspection l = pull test q = pull test and pre-cap inspection k = one lot date code w = one lot date code and precap source y = one lot date code and 100% pull test z = one lot date code, precap source and 100% pull test blank = none of the above accuracy: 3 = 4 minutes 4 = 2 minutes 5 = 1 minute process requirements*: 0 = standard ddc processing, no burn-in (see table below.) 2 = b* 6 = b* with pind testing 7 = b* with solder dip 8 = b* with pind testing and solder dip 9 = standard ddc processing with solder dip, no burn-in (see table below.) temperature grade/data requirements: 1 = -55c to +125c 2 = -40c to +85c 3 = 0c to +70c 4 = -55c to +125c with variables test data 5 = -40c to +85c with variables test data 8 = 0c to +70c with variables test data frequency range: 4 = dc to 1 khz * for availability of fully compliant mil-prf-38534 parts, please contact the ddc office nearest you. **standard ddc processing with burn-in and full temperature test see table below. 7 1015, table 1 burn-in a 2001 constant acceleration c 1010 temperature cycle a and c 1014 seal 2009, 2010, 2017, and 2032 inspection condition(s) method(s) test mil-std-883 standard ddc processing
8 the information in this data sheet is believed to be accurate; however, no responsibility is assumed by data device corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. specifications are subject to change without notice. printed in the u.s.a. a-02/98-1m ilc data device corporation registered to iso 9001 file no. a5976 105 wilbur place, bohemia, new york 11716-2482 for technical support - 1-800-ddc-5757 ext. 7389 or 7413 headquarters - tel: (631) 567-5600 ext. 7389 or 7413, fax: (631) 567-7358 southeast - tel: (703) 450-7900, fax: (703) 450-6610 west coast - tel: (714) 895-9777, fax: (714) 895-4988 europe - tel: +44-(0)1635-811140, fax: +44-(0)1635-32264 asia/pacific - tel: +81-(0)3-3814-7688, fax: +81-(0)3-3814-7689 world wide web - http://www.ddc-web.com
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